Performance
Hot paths: multiple-choice review
Crux Multiple-choice synthesis across the hot-paths unit — the five shapes, symptom-vs-cause reading, parent/child chains, IPC and TMA, false sharing, and the security gate.
Your altitude — climbing toward senior
ZeroJuniorMiddleSenior
You are at senior altitude — in orbitSix questions that cut across the whole unit. Each one mirrors a call you make mid-incident with a profile open — not a definition to recite, but a diagnosis to commit to before you spend a sprint on the wrong fix.
Goal
Confirm you can chain the unit together: read a wide leaf as a symptom, classify it into one of the shapes, locate the fix via the parent/child chain, and respect the constraints production adds — counters, tail latency, and the security gate.
Quiz
Completed
A flame graph shows renderTemplate at 28% self-time. The allocation profile then shows fmt.Sprintf at 62% of alloc bytes inside it. Two engineers want to switch template engines. What is the correct read?
Heads-up Self-time only says the samples landed here; it does not say whether the CPU was executing or feeding the allocator. The alloc profile reclassifies it as allocation-bound, where an algorithm rewrite barely helps.
Heads-up The cost is Sprintf + concat in the caller's loop, not the engine internals. A faster engine still pays for the same allocations the loop creates.
Heads-up Lock contention shows wide in the off-CPU/mutex profile and narrow on-CPU. This frame is wide on-CPU with a clear allocation signature.
Quiz
Completed
Two wide leaves look identical on the flame graph. perf stat shows leaf A at IPC 3.0 with a 1% cache-miss rate, and leaf B at IPC 0.4 with an 18% cache-miss rate. How do the fixes differ?
Heads-up B's IPC of 0.4 means the CPU is stalled ~60% of the time waiting for RAM. A new algorithm that touches the same scattered memory still stalls — it is memory-bound, not compute-bound.
Heads-up Miss rate classifies the shape; it does not rank impact. Priority comes from each leaf's share of total time (Amdahl), not from its miss rate.
Heads-up Allocation-bound shows as wide GC frames (mallocgc, scanobject), not as low IPC on the leaf itself. Cache misses are a memory-access pattern, not a GC signal.
Quiz
Completed
json.Marshal is at 28% CPU. In one service it has a single dominant parent (a request logger); in another it has twenty thin parents (handlers). Where does each fix belong?
Heads-up The single-parent case is a caller bug (encoding per request for logs); swapping libraries there leaves the redundant encode in place. Read the parent chain before reaching for the library.
Heads-up With one dominant parent the cheapest win is in the caller (call it less / not at all). Fan-in shape, not the leaf width, decides leaf-fix vs caller-fix.
Heads-up The cost is the marshalling work, not call dispatch. Inlining duplicates code and does nothing for the actual serialisation cost.
Quiz
Completed
A lock-free counter array uses atomic adds with per-thread indices, yet under load IPC collapses to 0.42, cache-miss rate hits 76%, and throughput gets worse as you add threads. Diagnosis and fix?
Heads-up Atomics are not locks, and contention would show as off-CPU wait, not on-CPU IPC collapse. XSNP_HITM confirms cache-line bouncing, not scheduler blocking.
Heads-up An atomic add is O(1). The cost is memory-system coherency traffic, which no algorithmic change to a single-instruction add can fix.
Heads-up 16 uint64 is 128 bytes and fits L1 easily. The problem is multiple cores writing the same 64-byte line, not capacity.
Quiz
Completed
A Node flame graph shows InterpreterCallStub frames dominating a function that should be hot, and latency spikes that do not correlate with traffic. After a 'better algorithm' rewrite, nothing improves. Why, and what is the actual fix?
Heads-up CPU-bound code shows optimised TurboFan frames, not interpreter frames. The interpreter frame is itself the deopt signal; no algorithm fixes a runtime that refuses to optimise the code.
Heads-up Allocation-bound shows wide GC frames, not interpreter frames. Pooling does not bring TurboFan back; type stabilisation does.
Heads-up Sample rate affects all functions uniformly; it cannot selectively manufacture interpreter frames for a single function. The deopt is real.
Quiz
Completed
An engineer makes a token-comparison hot path 3x faster by adding an early-exit branch on the first mismatching byte. The flame frame shrank and p50 improved. Why is this still wrong?
Heads-up Timing side channels are a real attack class; the constant-time, branch-free form exists precisely to deny the attacker this signal. A local speedup that leaks the secret is a regression.
Heads-up The broken property is timing, not concurrency. Even fully serialised, the data-dependent exit time leaks the matching-prefix length.
Heads-up p50 improving is irrelevant to security. The leak is in the relationship between input and time, not in any latency percentile.
Recap
The unit is one decision tree: a wide leaf names the symptom, not the cause; classify it into a shape (CPU, allocation, cache, lock, syscall, JIT deopt, or the hardware-only cases — false sharing, native-bridge); locate the fix via the parent chain (one caller vs many) and the child chain (work here vs one level down); reach for hardware counters and TMA when CPU-bound and memory-bound look identical; and gate any change to constant-time or security-sensitive paths through review. Diagnose first, fix one thing, prove it with a profile diff — and watch tail latency, not just the mean.