TLB (translation lookaside buffer)

RU: TLB (translation lookaside buffer)

An MMU cache that stores recent virtual-to-physical address translations. Modern CPUs use a multi-level TLB hierarchy: a small, typically fully-associative L1 TLB and a larger, set-associative L2 TLB. On a TLB hit the CPU bypasses the page-table walk; on a miss the MMU must traverse the page table in memory, adding several cycles. Context switches and large working sets cause TLB thrashing by evicting live translations.