false sharing

RU: false sharing

False sharing occurs when two or more CPU cores repeatedly modify independent variables that happen to reside on the same cache line, triggering the cache-coherence protocol to bounce the line between cores on every write even though the variables are logically unrelated. The result is heavy cross-core invalidation traffic and severely degraded throughput. It is mitigated by padding variables to different cache lines or reorganising data structures so hot per-thread fields do not share a line.